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MONT-BLANC

Starting date: 
01/10/2011
End date: 
30/06/2015

Energy efficiency is already a primary concern for the design of any computer system and it is unanimously recognized that future Exascale systems will be strongly constrained by their power consumption. This is why the Mont-Blanc project has set itself the following objective: to design a new type of computer architecture capable of setting future global High Performance Computing (HPC) standards that will deliver Exascale performance while using 15 to 30 times less energy.

Framework Programme: 

FP7

General notes: 

This new project is coordinated by the Barcelona Supercomputing Center (BSC) and has a budget of over 14 million Euros, including over 8 million Euros funded by the European Commission.

Mont-Blanc has three objectives:

- To develop a fullt energy-efficient HPC prototype using low-power commercially available embedded technology.

- To design a next-generation HPC system together with a range of embedded tchnologies in order to overcome the limitations identified in the prototype system.

- To develop a portfolio of exascale applications to be run on this new generation of HPC systems.

This will produce a new type of computer architecture capable of setting future global HPC standards that will provide Exascale performance using 15 to 30 times less energy.

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