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Workshop on Energy-efficient Computing on Parallel Architectures

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04/06/2019

Dear users,

we encourage you to partecipate to an upcoming Workshop about Energy-efficient Computing on Parallel

Architectures, scheduled for 10-13September 2019 in Prague.

 

The power requirements of large HPC facilities are becoming unsustainable for both were requirements

of large HPC facilities are becoming unsustainable for both technical and economic reasons. A significant

fraction of the total cost of ownership of HPC installations available nowadays is already driven by the

electricity bill, and the idea of charging users for the energy consumed by their applications is spreading.

This requires to find disruptive, smart and effective solutions, both at level of hardware and software to

maximize energy-efficiency and computing throughput of HPC systems within a given power envelop.

Several recently developed processors, such multi- and many-cores CPUs, GPUs, FPGAs and SoCs

(System on Chip) are engineered including features to improve computing energy-efficiency, e.g. higher

level of parallelism; dynamic clock frequency adaptation; capability of switching off idle cores, etc.

However, programming complexity and code portability can be affected by these choices, and computing

efficiency (as well as energy-efficiency) can be disrupted if applications are not properly coded to exploit

(or take into account) all of the hardware features, in the worst scenario, possibly increasing the

time-to-solution and the energy-to-solution. In addition, the heterogeneity of modern compute nodes and

systems, combined with the dynamic behavior of modern applications, require educated resource allocation

and resource management techniques to achieve energy efficiency.

 

This workshop aims to strongly encourage the exchange of experiences and knowledge in novel strategies

to exploit, monitor, analyze, and optimize the energy-efficiency of recent computing systems. We focus on

new trends including, hardware and software tools, scheduling and resource management techniques but

also algorithm-design and techniques in general, able to minimize the energy-to-solution of workloads, and

to reduce the energy required to operate computing systems.

 

Contribution should be submitted through the submission server ParCo2019 ConfTool

(https://www.conftool.org/parco2019) by July 15th 2019.

 

 IMPORTANT DATES

July 15th 2019: deadline for extended abstract submission

July 30th 2019: notification of acceptance

September 13th: mini-symposium

October 31st : full paper submission (ten (10) pages length)

 

HPC User Support @ Cineca